A hardware hackathon framed as a rescue: each team is the tech support behind a hero, writing Verilog to out-think the enemy. Round one is simulation, round two puts the same ideas onto real FPGA boards.
Timeline
Round 1
Simulation — Verilog problems against enemy algorithms, verified with custom testbenches
Round 2
Hardware challenge — FPGA programming and verification on Altera Cyclone boards
